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TS2012FC
Filter-free flip-chip stereo 2x2.5 W class D audio power amplifer
Features

Operates from VCC= 2.5 V to 5.5 V Dedicated standby mode active low for each channel Output power per channel: 1.15 W @5 V or 0.63 W @ 3.6 V into 8 with 1% THD+N max. Output power per channel: 1.85 W @5 V into 4 with 1% THD+N max. Output short-circuit protection Four gain setting steps: 6, 12, 18, 24 dB Low current consumption PSSR: 63 dB typ @ 217 Hz. Fast startup phase: 7.8 ms Thermal shutdown protection Flip-chip 16-bump lead-free package
LIN+ INL+ PVCC LOUT+
Flip chip 16 bumps
Pin connections (top view)
LOUT-
STDBYL
PGND
ROUT-
STDBYR
AGND
ROUT+
G1
G0
AVCC
Applications

LIN-
RIN-
RIN+
Cellular phone PDA
Description
The TS2012 is a fully differential stereo class D power amplifier able to drive up to 1.15 W into an 8 load at 5 V per channel. It achieves better efficiency compared to typical class AB audio amps. The device has four different gain settings utilizing 2 digital pins: G0 and G1. Pop and click reduction circuitry provides low on/off switch noise while allowing the device to start within 8 ms. Two standby pins (active low) allow each channel to be switched off separately. The TS2012 is available in a flip-chip 16-bump lead-free package.
April 2008
Rev 3
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www.st.com 31
Contents
TS2012FC
Contents
1 2 3 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 3.2 Electrical characteristics tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristic curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Common mode feedback loop limitations . . . . . . . . . . . . . . . . . . . . . . . . . 21 Low frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Wake-up time (tWU) and shutdown time (tSTBY) . . . . . . . . . . . . . . . . . . . . 23 Consumption in shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Output filter considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5 6 7
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
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TS2012FC
Absolute maximum ratings and operating conditions
1
Absolute maximum ratings and operating conditions
Table 1.
Symbol VCC Vin Toper Tstg Tj Rthja Pd ESD MM: machine model Latch-up Latch-up immunity VSTBY Standby pin maximum voltage Lead temperature (soldering, 10sec) Output short circuit protection
(7)
Absolute maximum ratings
Parameter Supply voltage (1) Input voltage
(2)
Value 6 GND to VCC -40 to + 85 -65 to +150 150
(3)
Unit V V C C C C/W
Operating free air temperature range Storage temperature Maximum junction temperature Thermal resistance junction to ambient Power dissipation HBM: human body model(5)
(6)
200 Internally limited(4)
2 200 200 GND to VCC 260
kV V mA V C
1. All voltage values are measured with respect to the ground pin. 2. The magnitude of the input signal must never exceed VCC + 0.3V / GND - 0.3V. 3. The device is protected in case of over temperature by a thermal shutdown active @ 150C. 4. Exceeding the power derating curves during a long period will cause abnormal operation. 5. Human body model: 100 pF discharged through a 1.5 k resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 6. Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ), done for all couples of pin combinations with other pins floating. 7. Implemented short-circuit protection protects the amplifier against damage by short-circuit between positive and negative outputs of each channel and between outputs and ground.
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Absolute maximum ratings and operating conditions Table 2.
Symbol VCC Vin Vic VSTBY RL VIH VIL Rthja Supply voltage Input voltage range Input common mode voltage Standby voltage input (2) Device ON Device in STANDBY(3) Load resistor GO, G1 - high level input voltage(4) GO, G1 - low level input voltage Thermal resistance junction to ambient (5)
(1)
TS2012FC
Operating conditions
Parameter Value 2.5 to 5.5 GND to VCC GND+0.5V to VCC-0.9V 1.4 VSTBY VCC GND VSTBY 0.4 4 1.4 VIH VCC GND VIL 0.4 90 Unit V V V V V V C/W
1. I Voo I 40 mV max with all differential gains except 24 dB. For 24 dB gain, input decoupling capacitors are mandatory. 2. Without any signal on standby pin, the device is in standby (internal 300 k +/-20% pull-down resistor). 3. Minimum current consumption is obtained when VSTBY = GND. 4. Between G0, G1pins and GND, there is an internal 300 k (+/-20%) pull-down resistor. When pins are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected (HiZ input). 5. With a 4-layer PCB.
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TS2012FC
Typical application
2
Figure 1.
Typical application
Typical application schematics
Cs2 0.1uF Gain Select Control Input capacitors are optional D2 Differential Left Input Left IN+ Cin A1 Cin Left INB1 LinLin+ Lout+ A3 Left speaker TS2012 A2 VCC Cs1 1uF
AVCC
PVCC
Gain Select
H PWM Bridge
LoutA4
C2
G0
Oscillator
B2 Differential Right Input Right IN+ Cin C1 Cin Right INB4 B3 STBYL STBYR RinD1 Rin+ Rout+ D3 Right speaker G1
Gain Select
H PWM Bridge RoutD4
Standby Control
AGND C3
Protection Circuit
PGND C4 Cs2 0.1uF
Standby Control
VCC
Cs1 1uF
Gain Select Control Input capacitors are optional D2 Differential Left Input Left IN+ Cin A1 Cin Left INB1 LinLin+ Lout+ A3 LC Output Filter Load TS2012 A2 PVCC
AVCC
Gain Select
H PWM Bridge
LoutA4
C2
G0
Oscillator
B2 Differential Right Input Right IN+ Cin C1 Cin Right INB4 B3 STBYL STBYR RinD1 Rin+ Rout+ D3 LC Output Filter Load G1
Gain Select
H PWM Bridge RoutD4
Standby Control
AGND C3
Protection Circuit
PGND C4
4 LC Output Filter Standby Control 15H 2 F 2 F
8 LC Output Filter 30H 1 F 1 F
15H
30H
5/31
Typical application Table 3. External component descriptions
Functional description Supply capacitor that provides power supply filtering.
TS2012FC
Components CS1, CS2 Cin
Input coupling capacitors (optional) that block the DC voltage at the amplifier input terminal. The capacitors also form a high pass filter with Zin (Fcl = 1 / (2 x x Zin x Cin)). Be aware that value of Zin is changing with gain setting.
Table 4.
Pin descriptions
Pin name Lin+ PVCC Lout+ LoutLinG1 STBYR STBYL RinG0 AGND PGND Rin+ AVCC Rout+ RoutPin description Left channel positive differential input Power supply voltage Left channel positive output Left channel negative output Left channel negative differential input Gain select pin (MSB) Standby pin (active low) for right channel output Standby pin (active low) for left channel output Right channel negative differential input Gain select pin (LSB) Analog ground Power ground Right channel positive differential input Analog supply voltage Right channel positive output Right channel negative output
Pin number A1 A2 A3 A4 B1 B2 B3 B4 C1 C2 C3 C4 D1 D2 D3 D4
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TS2012FC
Electrical characteristics
3
3.1
Table 5.
Symbol ICC ISTBY Voo
Electrical characteristics
Electrical characteristics tables
VCC = +5V, GND = 0V, Vic=2.5V, Tamb = 25C (unless otherwise specified)
Parameters and test conditions Supply current No input signal, no load, both channels Standby current No input signal, VSTBY = GND Output offset voltage Floating inputs, G = 6dB, RL = 8 Output power THD + N = 1% max, f = 1kHz, RL = 4 THD + N = 1% max, f = 1kHz, RL = 8 THD + N = 10% max, f = 1kHz, RL = 4 THD + N = 10% max, f = 1kHz, RL = 8 Total harmonic distortion + noise Po = 0.8W, G = 6dB, f =1kHz, RL = 8 Efficiency per channel Po = 1.85W, RL = 4 +15H Po = 1.16 W, RL = 8+15H Power supply rejection ratio with inputs grounded Cin=1F (1),f = 217Hz, RL = 8, Gain=6dB, Vripple = 200mVpp Channel separation Po = 0.9W, G = 6dB, f =1kHz, RL = 8 Common mode rejection ratio Cin=1F, f = 217Hz, RL = 8, Gain=6dB, VICM = 200mVpp Gain value with no load G1 = G0 = VIL G1 = VIL & G0 = VIH G1 = VIH & G0 = VIL G1 = G0 = VIH Single-ended input impedance Referred to ground Gain = 6dB Gain = 12dB Gain = 18dB Gain = 24dB Pulse width modulator base frequency Signal to noise ratio (A-weighting) Po = 1.1W, G = 6dB, RL = 8 5.5 11.5 17.5 23.5 1.85 1.15 2.5 1.6 0.5 Min. Typ. 5 1 Max. 7 2 25 Unit mA A mV
Po
W
THD + N
%
Efficiency
78 88 65
%
PSRR
dB
Crosstalk
90
dB
CMRR
63
dB
Gain
6 12 18 24
6.5 12.5 18.5 24.5
dB
Zin
24 24 12 6 190
30 30 15 7.5 280 99
36 36 18 9 370
k
FPWM SNR
kHz dB
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Electrical characteristics Table 5.
Symbol tWU tSTBY
TS2012FC
VCC = +5V, GND = 0V, Vic=2.5V, Tamb = 25C (unless otherwise specified) (continued)
Parameters and test conditions Total wake-up time Standby time(2) Output voltage noise f = 20Hz to 20kHz, RL=8 Unweighted (filterless, G=6dB) A-weighted (filterless, G=6dB) Unweighted (with LC output filter, G=6dB) A-weighted (with LC output filter, G=6dB) Unweighted (filterless, G=24dB) A-weighted (filterless, G=24dB) Unweighted (with LC output filter, G=24dB) A-weighted (with LC output filter, G=24dB)
(2)
Min. 9 11
Typ. 13 15.8 61 31 59 31 87 52 87 53
Max. 16.5 20
Unit ms ms
VN
VRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz. 2. See Section 4.6: Wake-up time (tWU) and shutdown time (tSTBY) on page 23
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TS2012FC Table 6.
Symbol ICC ISTBY Voo
Electrical characteristics VCC = +3.6V, GND = 0V, Vic=1.8V, Tamb = 25C (unless otherwise specified)
Parameter Supply current No input signal, no load, both channels Standby current No input signal, VSTBY = GND Output offset voltage Floating inputs, G = 6dB, RL = 8 Output power THD + N = 1% max, f = 1kHz, RL = 4 THD + N = 1% max, f = 1kHz, RL = 8 THD + N = 10% max, f = 1kHz, RL = 4 THD + N = 10% max, f = 1kHz, RL = 8 Total harmonic distortion + noise Po = 0.45W, G = 6dB, f =1kHz, RL = 8 Efficiency per channel Po = 0.96W, RL = 4 +15H Po = 0.63W, RL = 8+15H Power supply rejection ratio with inputs grounded Cin=1F (1),f = 217Hz, RL = 8, Gain=6dB, Vripple = 200mVpp Channel separation G = 6dB, f =1kHz, RL = 8 Common mode rejection ratio Cin=1F, f = 217Hz, RL = 8, Gain=6dB, VICM = 200mVpp Gain value with no load G1 = G0 = VIL G1 = VIL & G0 = VIH G1 = VIH & G0 = VIL G1 = G0 = VIH Single-ended input impedance Referred to ground Gain = 6dB Gain = 12dB Gain = 18dB Gain = 24dB Pulse width modulator base frequency Signal-to-noise ratio (A-weighting) Po = 0.6W, G = 6dB, RL = 8 Total wake-up time(2) Standby time(2) 7.5 10 5.5 11.5 17.5 23.5 0.96 0.63 1.3 0.8 0.35 Min. Typ. 3.5 0.7 Max. 5.5 2 25 Unit mA A mV
Po
W
THD + N
%
Efficiency
78 88 65
%
PSRR
dB
Crosstalk
90
CMRR
62
dB
Gain
6 12 18 24
6.5 12.5 18.5 24.5
dB
Zin
24 24 12 6 190
30 30 15 7.5 280 96 11.3 13.8
36 36 18 9 370
k
FPWM SNR tWU tSTBY
kHz dB
15 18
ms ms
9/31
Electrical characteristics Table 6.
Symbol
TS2012FC
VCC = +3.6V, GND = 0V, Vic=1.8V, Tamb = 25C (unless otherwise specified) (continued)
Parameter Output voltage noise f = 20Hz to 20kHz, RL=8 Unweighted (filterless, G=6dB) A-weighted (filterless, G=6dB) Unweighted (with LC output filter, G=6dB) A-weighted (with LC output filter, G=6dB) Unweighted (filterless, G=24dB) A-weighted (filterless, G=24dB) Unweighted (with LC output filter, G=24dB) A-weighted (with LC output filter, G=24dB) Min. Typ. Max. Unit
VN
54 28 52 27 80 50 79 49
VRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz. 2. See Section 4.6: Wake-up time (tWU) and shutdown time (tSTBY) on page 23
10/31
TS2012FC Table 7.
Symbol ICC ISTBY Voo
Electrical characteristics VCC= +2.5V, GND= 0V, Vic=1.25V, Tamb= 25C (unless otherwise specified)
Parameter Supply current No input signal, no load, both channels Standby current No input signal, VSTBY = GND Output offset voltage Floating inputs, G = 6dB, RL = 8 Output power THD + N = 1% max, f = 1kHz, RL = 4 THD + N = 1% max, f = 1kHz, RL = 8 THD + N = 10% max, f = 1kHz, RL = 4 THD + N = 10% max, f = 1kHz, RL = 8 Total harmonic distortion + noise Po = 0.2W, G = 6dB, f =1kHz, RL = 8 Efficiency per channel Po = 0.45W, RL = 4 +15H Po = 0.3W, RL = 8+15H Power supply rejection ratio with inputs grounded Cin=1F (1),f = 217Hz, RL = 8, Gain=6dB, Vripple = 200mVpp Channel separation G = 6dB, f =1kHz, RL = 8 Common mode rejection ratio Cin=1F, f = 217Hz, RL = 8, Gain=6dB, VICM = 200mVpp Gain value with no load G1 = G0 = VIL G1 = VIL & G0 = VIH G1 = VIH & G0 = VIL G1 = G0 = VIH Single-ended input impedance Referred to ground Gain = 6dB Gain = 12dB Gain = 18dB Gain = 24dB Pulse width modulator base frequency Signal-to-noise ratio (A-weighting) Po = 0.28W, G = 6dB, RL = 8 Total wake-up time(2) Standby time(2) 3 8 5.5 11.5 17.5 23.5 0.45 0.3 0.6 0.38 0.2 Min. Typ. 2.8 0.45 Max. 4 2 25 Unit mA A mV
Po
W
THD + N
%
Efficiency
78 87 65
%
PSRR
dB
Crosstalk
90
CMRR
62
dB
Gain
6 12 18 24
6.5 12.5 18.5 24.5
dB
Zin
24 24 12 6 190
30 30 15 7.5 280 93 7.8 12
36 36 18 9 370
k
FPWM SNR tWU tSTBY
kHz dB
12 16
ms ms
11/31
Electrical characteristics Table 7.
Symbol
TS2012FC
VCC= +2.5V, GND= 0V, Vic=1.25V, Tamb= 25C (unless otherwise specified) (continued)
Parameter Output voltage noise f = 20Hz to 20kHz, RL=8 Unweighted (filterless, G=6dB) A-weighted (filterless, G=6dB) Unweighted (with LC output filter, G=6dB) A-weighted (with LC output filter, G=6dB) Unweighted (filterless, G=24dB) A-weighted (filterless, G=24dB) Unweighted (with LC output filter, G=24dB) A-weighted (with LC output filter, G=24dB) Min. Typ. Max. Unit
VN
51 26 49 26 77 49 76 48
VRMS
1. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the superimposed sinus signal to VCC @ f = 217 Hz. 2. See Section 4.6: Wake-up time (tWU) and shutdown time (tSTBY) on page 23
12/31
TS2012FC
Electrical characteristics
3.2
Electrical characteristic curves
The graphs shown in this section use the following abbreviations:

RL+ 15 H or 30 H = pure resistor + very low series resistance inductor Filter = LC output filter (1 F+ 30 H for 4 and 0.5 F+15 H for 8)
All measurements are done with CS1=1 F and CS2=100 nF (see Figure 2), except for the PSRR where CS1 is removed (see Figure 3). Figure 2. Test diagram for measurements
Cs1 1 F Cs2 100nF
VCC
GND Cin In+ Out+
GND RL 4 or 8 15H or 30 H or LC Filter 5th order 50kHz low-pass filter
1/2 TS2012 InCin GND Out-
Audio M easurement Bandwith < 30kHz
13/31
Electrical characteristics Figure 3. Test diagram for PSRR measurements
Cs2 100nF
TS2012FC
VCC
20Hz to 20kHz
Vripple
Vcc
1 F Cin In+
GND Out+
GND RL 4 or 8 15H or 30 H or LC Filter 5th order 50kHz low-pass filter
1/2 TS2012 InCin 1 F GND GND Out-
5th order 50kHz low-pass filter reference
RMS Selective Measurement Bandwith =1% of Fmeas
14/31
TS2012FC
Electrical characteristics
Figure 4.
Current consumption vs. power supply voltage
Figure 5.
Current consumption vs. standby voltage (one channel)
6 5
No load Tamb = 25C Both channels active
Current Consumption (mA)
3 Vcc=5V
Current Consumption (mA)
4 One channel active 3 2 1 0
2
Vcc=3.6V
One channel active 1 Vcc=2.5V
No load Tamb = 25C 0 0 1 2 3 4 5
0
1
2
3
4
5
Power Supply Voltage (V)
Standby Voltage (V)
Figure 6.
Efficiency vs. output power (one channel)
1.0 0.9
Figure 7.
Efficiency vs. output power (one channel)
0.50 0.45
100
100
80
Efficiency (%)
0.8
Dissipated Power (W) Efficiency (%)
80 Efficiency 60 Power dissipation
0.40 0.35 0.30 0.25
Dissipated Power (W) Dissipated Power (W)
Efficiency 60
0.7 0.6 0.5
40
Power dissipation
0.4 Vcc = 5V RL = 4 + 16H 0.2 F = 1kHz 0.1 THD+N 10% 0.0 2.0 2.4 0.3
40
0.20 0.15 Vcc = 3.6V RL = 4 + 16H 0.10 F = 1kHz 0.05 THD+N 10% 0.00 1.0 1.2 1.4
20
20
0 0.0
0.4
0.8 1.2 1.6 Output Power (W)
0 0.0
0.2
0.4
0.6 0.8 Output Power (W)
Figure 8.
Efficiency vs. output power (one channel)
0.24 0.22 0.20
Dissipated Power (W)
Figure 9.
Efficiency vs. output power (one channel)
0.30 0.28 0.26 0.24 0.22 0.20 0.18 0.16 0.14 0.12 0.10 0.08 Vcc = 5V RL = 8 + 16H 0.06 0.04 F = 1kHz 0.02 THD+N 10% 0.00 1.2 1.4 1.6
100
100
80
Efficiency (%)
80 Efficiency
Efficiency (%)
0.18 Efficiency 60 Power dissipation 0.16 0.14 0.12 0.10 0.08 20 Vcc = 2.5V RL = 4 + 16H F = 1kHz THD+N 10% 0.1 0.2 0.3 0.4 Output Power (W) 0.5 0.06 0.04 0.02
60 Power dissipation 40
40
20
0 0.0
0.00 0.6
0 0.0
0.2
0.4
0.6 0.8 1.0 Output Power (W)
15/31
Electrical characteristics
TS2012FC
Figure 10. Efficiency vs. output power (one channel)
100 0.15
Figure 11. Efficiency vs. output power (one channel)
100 0.08
80
Efficiency (%)
Efficiency
Dissipated Power (W) Efficiency (%)
80 0.10 Efficiency Power dissipation 40 Vcc = 2.5V RL = 8 + 16H F = 1kHz THD+N 10% 0.05 0.10 0.15 0.20 0.25 Output Power (W) 0.30 0.35 0.02 0.04
Dissipated Power (W)
0.06 60
60 Power dissipation 40 0.05 20 Vcc = 3.6V RL = 8 + 16H F = 1kHz THD+N 10% 0.1 0.2 0.3 0.4 0.5 0.6 Output Power (W) 0.7 0.8 0.00 0.9
20
0 0.0
0 0.00
0.00 0.40
Figure 12. PSRR vs. frequency
0 -10 -20 -30
PSRR (dB)
Figure 13. PSRR vs. frequency
0 Vcc = 3.6V Vripple = 200mVpp Cin = 10F RL = 8 + 16H Tamb = 25C G=+24dB G=+18dB
Vcc = 5V Vripple = 200mVpp Cin = 10F RL = 8 + 16H Tamb = 25C G=+24dB G=+18dB
PSRR (dB)
-10 -20 -30 -40 -50 -60 -70
-40 -50 -60 -70 -80 -90 -100 100 1000 Frequency (Hz) 10000 G=+6dB G=+12dB
-80 -90 -100
G=+6dB
G=+12dB
100
1000
Frequency (Hz)
10000
Figure 14. PSRR vs. frequency
0 -10 -20 -30
PSRR (dB)
Figure 15. PSRR vs. common mode input voltage
0 -10 -20 -30
PSRR (dB)
Vcc = 2.5V Vripple = 200mVpp Cin = 10F RL = 8 + 16H Tamb = 25C G=+24dB G=+18dB
Vcc = 5V Vripple = 200mVpp F = 217Hz RL = 8 + 16H Tamb = 25C
G=+24dB G=+18dB
-40 -50 -60 -70 -80 -90 G=+6dB G=+12dB
-40 -50 -60 -70 -80 -90 -100 G=+12dB 0 1 2 3 G=+6dB 4 5
-100
100
1000
Frequency (Hz)
10000
Common Mode Input Voltage (V)
16/31
TS2012FC
Electrical characteristics
Figure 16. PSRR vs. common mode input voltage
0 -10 -20 -30
PSRR (dB)
Figure 17. PSRR vs. common mode input voltage
0 Vcc = 2.5V Vripple = 200mVpp F = 217Hz RL = 8 + 16H Tamb = 25C
Vcc = 3.6V Vripple = 200mVpp F = 217Hz RL = 8 + 16H Tamb = 25C
-10 -20 G=+24dB G=+18dB
PSRR (dB)
-30 -40
G=+24dB
-40 -50 -60 -70 -80 -90 -100 0.0 0.5 1.0 G=+12dB 1.5
G=+18dB -50 -60 -70 -80
G=+6dB 2.0 2.5 3.0 3.5
-90 -100 0.0 0.5
G=+12dB 1.0
G=+6dB 1.5 2.0 2.5
Common Mode Input Voltage (V)
Common Mode Input Voltage (V)
Figure 18. CMRR vs. frequency
0 -10 -20 -30
CMRR (dB)
Figure 19. CMRR vs. frequency
0 Vcc = 3.6V Vripple = 200mVpp Cin = 10F RL = 8 + 15H Tamb = 25C G=+18dB G=+24dB
Vcc = 5V Vripple = 200mVpp Cin = 10F RL = 8 + 15H Tamb = 25C G=+18dB G=+24dB
CMRR (dB)
-10 -20 -30 -40 -50 -60 -70 -80
-40 -50 -60 -70 -80 -90 -100 G=+6dB G=+12dB 1000
Frequency (Hz)
-90 10000 -100
G=+6dB
G=+12dB 1000
Frequency (Hz)
100
100
10000
Figure 20. CMRR vs. frequency
0 -10 -20 -30
CMRR (dB)
Figure 21. CMRR vs. common mode input voltage
0 -10 -20 -30
CMRR (dB)
Vcc = 2.5V Vripple = 200mVpp Cin = 10F RL = 8 + 15H Tamb = 25C G=+18dB G=+24dB
Vripple = 200mVpp F = 217Hz, G = +6dB RL = 8 + 15H Tamb = 25C
-40 -50 -60 -70 -80 -90 -100 G=+6dB G=+12dB
-40 -50 -60 -70 -80 -90 -100
Vcc=3.6V Vcc=2.5V
Vcc=5V
100
1000
Frequency (Hz)
10000
0
1
2
3
4
5
Common Mode Input Voltage (V)
17/31
Electrical characteristics
TS2012FC
Figure 22. CMRR vs. common mode input voltage
0 -10 -20 -30
CMRR (dB)
Figure 23. CMRR vs. common mode input voltage
0 Vripple = 200mVpp F = 217Hz, G = +18dB RL = 8 + 15H Tamb = 25C Vcc=2.5V Vcc=3.6V
Vripple = 200mVpp F = 217Hz, G = +12dB RL = 8 + 15H Tamb = 25C Vcc=3.6V
CMRR (dB)
-10 -20 -30 -40 -50 -60 -70 -80 -90
Vcc=5V
-40 -50 -60 -70 -80 -90 -100
0 1
Vcc=2.5V
Vcc=5V
2
3
4
5
-100
0
1
2
3
4
5
Common Mode Input Voltage (V)
Common Mode Input Voltage (V)
Figure 24. CMRR vs. common mode input voltage
0 -10 -20 -30
CMRR (dB)
Figure 25. THD+N vs. output power
10
Vripple = 200mVpp F = 217Hz, G = +24dB RL = 8 + 15H Tamb = 25C
THD + N (%)
Vcc=3.6V Vcc=2.5V
Vcc=5V
F = 1kHz RL = 4 + 15H G = +6dB BW < 30kHz 1 Tamb = 25C
Vcc=5V Vcc=3.6V
-40 -50 -60 -70 -80
0
0.1 Vcc=2.5V
1
2
3
4
5
0.01 0.01
0.1
Output power (W)
1
Common Mode Input Voltage (V)
Figure 26. THD+N vs. output power
10 F = 1kHz RL = 8 + 15H G = +6dB BW < 30kHz Tamb = 25C Vcc=5V Vcc=3.6V
Figure 27. THD+N vs. frequency
10 RL = 8 + 15H G = +6dB BW < 30kHz Tamb = 25C 1
THD + N (%)
Vcc=5V, Po=800mW
1
THD + N (%)
0.1 Vcc=2.5V
0.1
Vcc=3.6V, Po=450mW Vcc=5V, Po=200mW
0.01 0.01
0.1
Output power (W)
1
0.01
100
1000
Frequency (Hz)
10000
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TS2012FC
Electrical characteristics
Figure 28. THD+N vs. frequency
10 RL = 8 + 15H G = +6dB BW < 30kHz Tamb = 25C 1
THD + N (%)
Figure 29. Crosstalk vs. frequency
0 -10 -20
Crosstalk Level (dB)
Vcc=5V, Po=800mW
-30 -40 -50 -60 -70 -80 -90 -100 -110
RL = 4 + 15H Cin = 1F G = +6dB Tamb = 25C
Vcc=5V
Vcc=2.5V
0.1
Vcc=3.6V, Po=450mW Vcc=5V, Po=200mW
Vcc=3.6V 100 1000
Frequency (Hz)
0.01
-120
100 1000
Frequency (Hz)
10000
10000
Figure 30. Crosstalk vs. frequency
Figure 31. Output power vs. power supply voltage
2.0
Output power at 1% THD + N (mW)
0 -10 -20
Crosstalk Level (dB)
-30 -40 -50 -60 -70 -80 -90 -100 -110 -120
RL = 8 + 15H Cin = 1F G = +6dB Tamb = 25C
F = 1kHz 1.8 BW < 30kHz 1.6 Tamb = 25C 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 2.5 3.0 3.5 4.0 4.5 5.0 RL=8 +15H RL=4 +15H
Vcc=5V
Vcc=2.5V
Vcc=3.6V 100 1000
Frequency (Hz)
10000
Supply voltage (V)
Figure 32. Output power vs. power supply voltage
2.6 2.4 F = 1kHz BW < 30kHz 2.2 Tamb = 25C 2.0 1.8 RL=4 +15H 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 2.5 3.0 3.5
Vcc (V)
Figure 33. Power derating curves
Flip-Chip Package Power Dissipation (W)
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0 No Heat sink AMR value 25 50 75 100 125 150 With a 4-layer PCB
Output power at 10% THD + N (W)
RL=8 +15H
4.0
4.5
5.0
Ambiant Temperature (C)
19/31
Electrical characteristics
TS2012FC
Figure 34. Startup and shutdown phase VCC= 5V, G= 6dB, Cin= 1F, inputs grounded
Figure 35. Startup and shutdown phase VCC= 5V, G= 6dB, Cin= 1F, Vin= 2Vpp, F= 500Hz
Out+ Out-
Out+ Out-
Standby
Standby Out+ - OutOut+ - Out-
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TS2012FC
Application information
4
4.1
Application information
Differential configuration principle
The TS2012 is a monolithic fully-differential input/output class D power amplifier. The TS2012 also includes a common-mode feedback loop that controls the output bias value to average it at VCC/2 for any DC common mode input voltage. This allows the device to always have a maximum output voltage swing, and by consequence, maximize the output power. Moreover, as the load is connected differentially compared with a single-ended topology, the output is four times higher for the same power supply voltage. The advantages of a full-differential amplifier are:

High PSRR (power supply rejection ratio) High common mode noise rejection Virtually zero pop without additional circuitry, giving a faster start-up time compared with conventional single-ended input amplifiers Easier interfacing with differential output audio DAC No input coupling capacitors required thanks to common mode feedback loop
4.2
Gain settings
In the flat region of the frequency-response curve (no input coupling capacitor or internal feedback loop + load effect), the differential gain can be set to 6, 12 18, or 24 dB depending on the logic level of the G0 and G1 pins, as shown in Table 8. Table 8.
G1 0 0 1 1
Gain settings with G0 and G1 pins
G0 0 1 0 1 Gain (dB) 6 12 18 24 Gain (V/V) 2 4 8 16
Note:
Between pins G0, G1 and GND there is an internal 300 k (+/-20%) resistor. When the pins are floating, the gain is 6 dB. In full standby (left and right channels OFF), these resistors are disconnected (HiZ input).
4.3
Common mode feedback loop limitations
As explained previously, the common mode feedback loop allows the output DC bias voltage to be averaged at VCC/2 for any DC common mode bias input voltage. Due to the Vic limitation of the input stage (see Table 2: Operating conditions on page 4), the common mode feedback loop can fulfil its role only within the defined range.
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Application information
TS2012FC
4.4
Low frequency response
If a low frequency bandwidth limitation is required, it is possible to use input coupling capacitors. In the low frequency region, the input coupling capacitor Cin starts to have an effect. Cin forms, with the input impedance Zin, a first order high-pass filter with a -3 dB cutoff frequency (see Table 5 to Table 7):
1 F CL = ------------------------------------------2 Z in C in
So, for a desired cut-off frequency FCL, Cin is calculated as follows:
1 C in = --------------------------------------------2 Z in F CL
with FCL in Hz, Zin in and Cin in F. The input impedance Zin is for the whole power supply voltage range and it changes with the gain setting. There is also a tolerance around the typical values (see Table 5 to Table 7). Figure 36. Cut-off frequency vs. input capacitor
Tamb=25C
Low -3dB Cut Off Frequency (Hz)
100 G=24dB Zin=7.5k typ.
10
G=18dB Zin=15k typ. G=6dB, G=12dB Zin=30k typ.
1 0.1
1
Input Capacitor Cin (F)
4.5
Decoupling of the circuit
Power supply capacitors, referred to as CS1 and CS2 are needed to correctly bypass the TS2012. The TS2012 has a typical switching frequency of 280 kHz and output fall and rise time about 5 ns. Due to these very fast transients, careful decoupling is mandatory. A 1 F ceramic capacitor (CS1) between PVCC and PGND and one additional ceramic capacitor 0.1 F (CS2) are enough. A 1 F capacitor must be located as close as possible to the device PVCC pin in order to avoid any extra parasitic inductance or resistance created by a long track wire. Parasitic loop inductance, in relation with di/dt, introduces overvoltage that decreases the global efficiency of the device and may cause, if this parasitic inductance
22/31
TS2012FC
Application information is too high, a TS2012 breakdown. For filtering low frequency noise signals on the power line, you can use a capacitor a CS1 capacitor of 4.7 F or greater. In addition, even if a ceramic capacitor has an adequate high frequency ESR (equivalent series resistance) value, its current capability is also important. A 0603 size is a good compromise, particularly when a 4 load is used. Another important parameter is the rated voltage of the capacitor. A 1 F/6.3 V capacitor used at 5 V, loses about 50% of its value. With a power supply voltage of 5 V, the decoupling value, instead of 1 F, could be reduced to 0.5 F. As CS has particular influence on the THD+N in the medium to high frequency region, this capacitor variation becomes decisive. In addition, less decoupling means higher overshoots which can be problematic if they reach the power supply AMR value (6 V).
4.6
Wake-up time (tWU) and shutdown time (tSTBY)
During the wake-up sequence when the standby is released to set the device ON, there is a delay. The wake-up sequence of the TS2012 consists of two phases. During the first phase tWU-A, a digitally generated delay mutes the outputs. Then, the gain increasing phase tWU-A begins. The gain increases smoothly form the mute state to the preset gain selected by the digital pins G0 and G1. This startup sequence allows to avoid any pop noise during startup of the amplifier. See Figure 37: Wake-up phase. Figure 37. Wake-up phase.
STBY Level HI
STBY
LO
STBY Time Gain increasing Preset gain
G = 24dB G = 18dB G = 12dB G = 6dB
Gain
Mute
Mute tWU-A tWU tWU-B Time
When the standby command is set, the time required to set the output stage into high impedance and to put the internal circuitry in shutdown mode is called the standby time. This time is used to decrease the gain from its nominal value set by the digital pins G0 and G1 to mute and avoid any pop noise during shutdown. The gain decreases smoothly until the outputs are muted. See Figure 38: Shutdown phase
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Application information Figure 38. Shutdown phase
TS2012FC
STBY Level HI
STBY
LO Preset gain Gain
G = 24dB G = 18dB G = 12dB G = 6dB
STBY Time
Gain decreasing
Mute tSTBY
Mute Time
4.7
Consumption in shutdown mode
Between the shutdown pin and GND there is an internal 300 k (+-/20%) resistor. This resistor forces the TS2012 to be in shutdown when the shutdown input is left floating. However, this resistor also introduces additional shutdown power consumption if the shutdown pin voltage is not at 0 V. With a 0.4 V shutdown voltage pin for example, you must add 0.4 V/300 k=1.3 A in typical (0.4 V/240 k=1.66 A in maximum) for each shutdown pin to the standby current specified in Table 5 to Table 7. Of course, this current will be provided by the external control device for standby pins.
4.8
Single-ended input configuration
It is possible to use the TS2012 in a single-ended input configuration. However, input coupling capacitors are mandatory in this configuration. The schematic diagram in Figure 39 shows a typical single-ended input application.
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TS2012FC
Application information Figure 39. Typical application for single-ended input configuration
VCC Cs2 0.1uF VCC Cs1 1uF
Gain Select Control D2 TS2012 Left Input Cin A1 Cin B1 LinLin+ Lout+ A3 Left speaker A2 PVCC
AVCC
Gain Select
H PWM Bridge
LoutA4
C2
G0
Oscillator
B2 G1
Right Input Cin
D1
Rin+
Rout+
D3 Right speaker
Gain
C1 Rin-
H PWM Bridge RoutD4
Select
Cin B4 B3 STBYL STBYR
Standby Control
AGND C3
Protection Circuit
PGND C4
Standby Control
4.9
Output filter considerations
The TS2012 is designed to operate without an output filter. However, due to very sharp transients on the TS2012 output, EMI radiated emissions may cause some standard compliance issues. These EMI standard compliance issues can appear if the distance between the TS2012 outputs and loudspeaker terminal are long (typically more than 50 mm, or 100 mm in both directions, to the speaker terminals). Because the PCB layout and internal equipment device are different for each configuration, it is difficult to provide a one-size-fits-all solution. However, to decrease the probability of EMI issues, there are several simple rules to follow:

Reduce, as much as possible, the distance between the TS2012 output pins and the speaker terminals. Use a ground plane for "shielding" sensitive wires. Place, as close as possible to the TS2012 and in series with each output, a ferrite bead with a rated current of minimum 2.5A and impedance greater than 50 at frequencies above 30MHz. If, after testing, these ferrite beads are not necessary, replace them by a short-circuit. Allow extra footprint to place, if necessary, a capacitor to short perturbations to ground (see Figure 40).
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Application information Figure 40. Ferrite chip bead placement
TS2012FC
From output
Ferrite chip bead
to speaker about 100pF gnd
In the case where the distance between the TS2012 output and the speaker terminals is too long, it is possible to have low frequency EMI issues due to the fact that the typical operating frequency is 280 kHz. In this configuration, it is necessary to use the output filter represented in Figure 1 on page 5 as close as possible to the TS2012.
4.10
Short-circuit protection
The TS2012 includes output short-circuit protection. This protection prevents the device from being damaged in case of fault conditions on the amplifier outputs. When a channel is in operating mode and a short-circuit occurs between two outputs of the channel or between an output and ground, the short-circuit protection detects this situation and puts the appropriate channel into standby. To put the channel back into operating mode, is needed to put standby pin of the channel to logical LO and after again to logical HI and wake-up the channel.
4.11
Thermal shutdown
The TS2012 device has an internal thermal shutdown protection in the event of extreme temperatures to protect the device from overheating. Thermal shutdown is active when the device reaches 150C. When the temperature decreases to safe levels, the circuit switches back to normal operation.
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TS2012FC
Package information
5
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 41. Flip-chip package mechanical drawing
2.1 mm
2.1 mm
250m
G1
INL+
Die size: 2.1x2.1 mm 30m Die height (including bumps): 600m Bump diameter: 315m 50m Bump diameter before reflow: 300m 10m Bump height: 250m 40m Die height: 350m 20m Pitch: 500m 50m Bump Coplanarity: 60m max Optional*: Back coating height: 40m
500m 40 m* 600 m
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Package information Figure 42. Pinout (top view)
TS2012FC
4
LOUT-
STDBYL
PGND
ROUT-
3
LOUT+
STDBYR
AGND
ROUT+
2
PVCC
G1
G0
AVCC
1
LIN+ INL+
LIN-
RIN-
RIN+
A
Figure 43. Marking (top view)
B
C
D
ST Logo Symbol for lead-free: E Two first product code: K0 Third X: Assembly line plant code Three digits date code: Y for year - WW for week The dot indicates pin A1
E

K0 X YWW

28/31
TS2012FC Figure 44. Tape and reel schematics (top view)
Package information
4
1 A A
Die size Y + 70m
1
8
Die size X + 70m
4
All dimensions are in mm
User direction of feed
Figure 45. Recommended footprint
500m =250m
500m
75m min. 100m max. Track
500m
=400m typ. =340m min.
150m min.
Non Solder mask opening
500m
Pad in Cu 18m with Flash NiAu (2-6m, 0.2m max.)
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Ordering information
TS2012FC
6
Ordering information
Table 9. Order code
Temperature range -40C to +85C Package Flip chip 16 Packing Tape & reel Marking K0
Order code TS2012EIJT
7
Revision history
Table 10.
Date 14-Jan-2008 16-Apr-2008 17-Apr-2008
Document revision history
Revision 1 2 3 Changes Initial release, preliminary information. Document status promoted to full datasheet (internal release). Public release of full datasheet.
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TS2012FC
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